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I am reverse-engineering a late-'80s IBM Wheelwriter typewriter, which runs off of an Intel 8088. It has a ROM chip, specifically: https://www.datasheets360.com/pdf/1277907997291200345?xrefPartId=1277907997291200345&alternatePartManufacturerId=0

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in a socket that holds the X86 code, and I'd like to emulate that chip by responding to memory requests via my Raspberry Pi, through the GPIO pins.

I am concerned that I won't be able to read the 14 address pins and respond on the 8 data pins fast enough. Here is the timing data:

enter image description here

Before I go and build the circuit, is this something that will be doable? What other things should I measure? Based on my logic analyzer readings, it looks like the pulse width coming from the 8088 is about 120ns.

Chris Gregg
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If I had to do this, I would use a 100ns 62256 SRAM chip and added some dual-port logic made from six 74244/74245 chips to it.

Then, I would use an additional µC, e.g. an ATtiny85 or such and clock it with the 4.77 MHz 8088 clock, so the RAM could be accessed by both CPUs in an alternating fashion. The RAM port is flipped with the 8088 clock, too. That way, the RAM is transparent to both.

I connected the ATtiny to the Pi via I²C, UART or USB, whatever fits best.

The simpler alternative is using a ZIF socket, a 29F256 Flash ROM and a programmer for it.

Janka
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