I looked for information about it in the documentation, but I couldn't
find it.
Well, some of their documentation says:
The TWAI controller’s interface consists of 4 signal lines known as
TX, RX, BUS-OFF, and CLKOUT. These four signal lines can be routed
through the GPIO Matrix to the ESP32’s GPIO pads.
And that sort of seems to be backed up by their examples that make use of TWAI_GENERAL_CONFIG_DEFAULT to generate a structure with the arguments filling fields that use gpoi_num_t.
There is documentation to the GPIO Matrix generally in the ESP32 technical reference. It is described there as follows:
The ESP32 chip features 34 physical GPIO pads. Each pad can be used as
a general-purpose I/O, or be connected to an internal peripheral
signal. The IO_MUX, RTC IO_MUX and the GPIO matrix are responsible for
routing signals from the peripherals to GPIO pads. Together these
systems provide highly configurable I/O.
(My emphasis in the above).
And also there is a table (Table 25) in Appendix 2 of the ESP32 datasheet for the GPIO matrix.
Many of the small chips, like the PIC16F series ones, have no internal routing for peripherals, except for deciding which of one or two special functions to use rather than GPIO and ADC channels. Most of the of the ATTiny and ATMega series AVR chips that are not in the 0- and 1- series don't. The 1- and 0- series an a few of the older series parts (e.g. ATTiny841) give you a fixed number (usually two) pre-determined destinations to chose from for some peripherals.
This sort of thing gets more flexible as you get into larger chips, but the having that "matrix" feature that lets choose more freely is comparatively rare. Some of the Cypress "PSoC" labeled chips have this sort of feature.
